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Silicon Labs /Series0 /EFM32LG /EFM32LG890F128 /ETM /ETMCR

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Interpret as ETMCR

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https://regviz.com/r/Silicon Labs/Series0/EFM32LG/EFM32LG890F128/ETM/ETMCR#0x0

31282724232019161512118743000000000000000000000000000000000000000000 (POWERDWN)POWERDWN0PORTSIZE0 (STALL)STALL0 (BRANCHOUTPUT)BRANCHOUTPUT0 (DBGREQCTRL)DBGREQCTRL0 (ETMPROG)ETMPROG0 (ETMPORTSEL)ETMPORTSEL0 (PORTMODE2)PORTMODE20PORTMODE0EPORTSIZE0 (TSTAMPEN)TSTAMPEN

Description

Main Control Register

Fields

POWERDWN

ETM Control in low power mode
PORTSIZE

ETM Port Size
STALL

Stall Processor
BRANCHOUTPUT

Branch Output
DBGREQCTRL

Debug Request Control
ETMPROG

ETM Programming
ETMPORTSEL

ETM Port Selection
PORTMODE2

Port Mode[2]
PORTMODE

Port Mode Control
EPORTSIZE

Port Size[3]
TSTAMPEN

Time Stamp Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data